{"id":2811,"date":"2025-07-25T10:40:48","date_gmt":"2025-07-25T09:40:48","guid":{"rendered":"https:\/\/workboot.fr\/ciela\/?page_id=2811"},"modified":"2025-07-25T12:57:48","modified_gmt":"2025-07-25T11:57:48","slug":"x86-amd","status":"publish","type":"page","link":"https:\/\/workboot.fr\/ciela\/x86-amd\/","title":{"rendered":"x86 &amp; AMD"},"content":{"rendered":"\n<h4 class=\"wp-block-heading\"><strong>&nbsp;Introduction \u00e0 l\u2019architecture x86<\/strong><\/h4>\n\n\n\n<p class=\"wp-block-paragraph\">L\u2019architecture&nbsp;<strong>x86<\/strong>&nbsp;est une famille de processeurs&nbsp;<strong>CISC<\/strong>&nbsp;(Complex Instruction Set Computer) d\u00e9velopp\u00e9e \u00e0 l\u2019origine par&nbsp;<strong>Intel<\/strong>&nbsp;(8086 en 1978) et aujourd\u2019hui domin\u00e9e par&nbsp;<strong>Intel et AMD<\/strong>.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">\ud83d\udd39&nbsp;<strong>Caract\u00e9ristiques principales<\/strong>&nbsp;:<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Jeu d\u2019instructions complexe<\/strong>&nbsp;(CISC) : Une seule instruction peut faire beaucoup (ex:&nbsp;<code>REP MOVSB<\/code>&nbsp;pour copier une cha\u00eene en m\u00e9moire).<\/li>\n\n\n\n<li><strong>Compatibilit\u00e9 ascendante<\/strong>&nbsp;: Les nouveaux CPU x86 peuvent toujours ex\u00e9cuter du code 32 bits (voir 16 bits en mode r\u00e9el).<\/li>\n\n\n\n<li><strong>Principalement utilis\u00e9 dans<\/strong>&nbsp;:\n<ul class=\"wp-block-list\">\n<li><strong>PC Windows\/Linux<\/strong>&nbsp;(Intel Core, AMD Ryzen)<\/li>\n\n\n\n<li><strong>Serveurs<\/strong>&nbsp;(Intel Xeon, AMD EPYC)<\/li>\n\n\n\n<li><strong>Consoles<\/strong>&nbsp;(PS4\/PS5 : AMD Jaguar\/Zen)<\/li>\n<\/ul>\n<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>&nbsp;\u00c9volution des architectures x86 (Intel vs AMD)<\/strong><\/h3>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Intel<\/strong><\/h4>\n\n\n\n<figure class=\"wp-block-table\"><table class=\"has-fixed-layout\"><thead><tr><th class=\"has-text-align-left\" data-align=\"left\">G\u00e9n\u00e9ration<\/th><th class=\"has-text-align-left\" data-align=\"left\">Ann\u00e9e<\/th><th class=\"has-text-align-left\" data-align=\"left\">Innovations<\/th><\/tr><\/thead><tbody><tr><td><strong>8086<\/strong><\/td><td>1978<\/td><td>Premier x86 (16 bits)<\/td><\/tr><tr><td><strong>80386<\/strong><\/td><td>1985<\/td><td>32 bits (mode prot\u00e9g\u00e9)<\/td><\/tr><tr><td><strong>Pentium<\/strong><\/td><td>1993<\/td><td>Pipeline superscalaire<\/td><\/tr><tr><td><strong>Core 2 Duo<\/strong><\/td><td>2006<\/td><td>Multic\u0153ur<\/td><\/tr><tr><td><strong>Nehalem (1\u00e8re Gen Core i)<\/strong><\/td><td>2008<\/td><td>Hyper-Threading<\/td><\/tr><tr><td><strong>Alder Lake (12th Gen)<\/strong><\/td><td>2021<\/td><td>Hybrid (P-Cores + E-Cores)<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>AMD<\/strong><\/h4>\n\n\n\n<figure class=\"wp-block-table\"><table class=\"has-fixed-layout\"><thead><tr><th class=\"has-text-align-left\" data-align=\"left\">G\u00e9n\u00e9ration<\/th><th class=\"has-text-align-left\" data-align=\"left\">Ann\u00e9e<\/th><th class=\"has-text-align-left\" data-align=\"left\">Innovations<\/th><\/tr><\/thead><tbody><tr><td><strong>K5<\/strong><\/td><td>1996<\/td><td>Premier x86 AMD<\/td><\/tr><tr><td><strong>Athlon (K7)<\/strong><\/td><td>1999<\/td><td>1er \u00e0 battre Intel en perf<\/td><\/tr><tr><td><strong>Opteron (K8)<\/strong><\/td><td>2003<\/td><td>64 bits (AMD64 \/ x86-64)<\/td><\/tr><tr><td><strong>Ryzen (Zen)<\/strong><\/td><td>2017<\/td><td>Retour en force face \u00e0 Intel<\/td><\/tr><tr><td><strong>Ryzen 7000 (Zen 4)<\/strong><\/td><td>2022<\/td><td>5nm, DDR5, PCIe 5.0<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n<p class=\"wp-block-paragraph\">\ud83d\udca1&nbsp;<strong>AMD a popularis\u00e9 le 64 bits (x86-64)<\/strong>, aujourd\u2019hui utilis\u00e9 m\u00eame par Intel !<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Registres x86 (32 et 64 bits)<br>Registres g\u00e9n\u00e9raux (32 bits : EAX, EBX\u2026 \/ 64 bits : RAX, RBX\u2026)<\/p>\n\n\n\n<p class=\"wp-block-paragraph\"><br>Registre Usage<br>EAX\/RAX Accumulateur (retour de fonctions)<br>EBX\/RBX Base (pointeur de donn\u00e9es)<br>ECX\/RCX Compteur (boucles)<br>EDX\/RDX Donn\u00e9es (op\u00e9rations I\/O)<br>ESI\/RSI Source (op\u00e9rations cha\u00eenes)<br>EDI\/RDI Destination (op\u00e9rations cha\u00eenes)<br>ESP\/RSP Stack Pointer (pile)<br>EBP\/RBP Base Pointer (cadre de pile)<br><\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Registres sp\u00e9ciaux<br>EIP\/RIP : Instruction Pointer (PC)<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">EFLAGS\/RFLAGS : Registre d\u2019\u00e9tat (Z\u00e9ro, Carry, Sign, etc.)<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Modes d\u2019ex\u00e9cution x86<\/strong><\/h3>\n\n\n\n<ol start=\"1\" class=\"wp-block-list\">\n<li><strong>Mode r\u00e9el (16 bits)<\/strong>\u00a0: Comme le 8086 (DOS).<\/li>\n\n\n\n<li><strong>Mode prot\u00e9g\u00e9 (32 bits)<\/strong>\u00a0: M\u00e9moire virtuelle, multit\u00e2che.<\/li>\n\n\n\n<li><strong>Mode long (64 bits)<\/strong>\u00a0: AMD64 (registres \u00e9tendus \u00e0 64 bits).<\/li>\n\n\n\n<li><strong>Mode hybride (UEFI, modern OS)<\/strong>\u00a0: Combinaison de 32\/64 bits.<\/li>\n<\/ol>\n\n\n\n<h2 class=\"wp-block-heading\">Jeu d\u2019instructions x86 (ASM)<\/h2>\n\n\n\n<p class=\"wp-block-paragraph\">Exemple de code NASM (32 bits)<\/p>\n\n\n\n<pre class=\"wp-block-code\"><code>mov eax, 42       ; EAX = 42  \nadd ebx, eax      ; EBX += EAX  \ncmp eax, ebx      ; Compare EAX et EBX  \njg label          ; Saute si EAX > EBX  <\/code><\/pre>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Instructions courantes<\/strong><\/h4>\n\n\n\n<figure class=\"wp-block-table\"><table class=\"has-fixed-layout\"><thead><tr><th class=\"has-text-align-left\" data-align=\"left\">Instruction<\/th><th class=\"has-text-align-left\" data-align=\"left\">Description<\/th><\/tr><\/thead><tbody><tr><td><code>MOV dest, src<\/code><\/td><td>Copie une valeur<\/td><\/tr><tr><td><code>ADD\/SUB dest, src<\/code><\/td><td>Addition\/Soustraction<\/td><\/tr><tr><td><code>CMP op1, op2<\/code><\/td><td>Compare (met \u00e0 jour EFLAGS)<\/td><\/tr><tr><td><code>JMP\/Jcc label<\/code><\/td><td>Saut (conditionnel)<\/td><\/tr><tr><td><code>CALL func<\/code><\/td><td>Appel de fonction<\/td><\/tr><tr><td><code>INT 0x80<\/code><\/td><td>Appel syst\u00e8me (Linux 32 bits)<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>&nbsp;Innovations r\u00e9centes (Intel vs AMD)<\/strong><\/h3>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Intel (12th\/13th Gen)<\/strong><\/h4>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Big.Little (Hybride)<\/strong>\u00a0: P-Cores (performance) + E-Cores (efficacit\u00e9).<\/li>\n\n\n\n<li><strong>DDR5 \/ PCIe 5.0<\/strong>\u00a0: Bande passante augment\u00e9e.<\/li>\n<\/ul>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>AMD (Ryzen 7000 \/ Zen 4)<\/strong><\/h4>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>5nm TSMC<\/strong>\u00a0: Meilleure efficacit\u00e9 \u00e9nerg\u00e9tique.<\/li>\n\n\n\n<li><strong>AM5 (DDR5 uniquement)<\/strong>\u00a0: Nouveau socket.<\/li>\n\n\n\n<li><strong>3D V-Cache<\/strong>\u00a0(Ryzen 7 5800X3D) : Cache empil\u00e9 pour les jeux.<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Comparaison x86 vs ARM vs RISC-V<\/strong><\/h3>\n\n\n\n<figure class=\"wp-block-table\"><table class=\"has-fixed-layout\"><thead><tr><th class=\"has-text-align-left\" data-align=\"left\"><strong>Crit\u00e8re<\/strong><\/th><th class=\"has-text-align-left\" data-align=\"left\"><strong>x86<\/strong><\/th><th class=\"has-text-align-left\" data-align=\"left\"><strong>ARM<\/strong><\/th><th class=\"has-text-align-left\" data-align=\"left\"><strong>RISC-V<\/strong><\/th><\/tr><\/thead><tbody><tr><td><strong>Type<\/strong><\/td><td>CISC<\/td><td>RISC<\/td><td>RISC<\/td><\/tr><tr><td><strong>Licence<\/strong><\/td><td>Propri\u00e9taire (Intel\/AMD)<\/td><td>Payante (ARM Ltd)<\/td><td>Open-source<\/td><\/tr><tr><td><strong>Performance<\/strong><\/td><td>Hautes perfs (PC\/serveurs)<\/td><td>\u00c9quilibre perf\/\u00e9nergie<\/td><td>D\u00e9pend de l\u2019impl\u00e9mentation<\/td><\/tr><tr><td><strong>\u00c9cosyst\u00e8me<\/strong><\/td><td>Tr\u00e8s mature (Windows\/Linux)<\/td><td>Dominant (mobile\/embarqu\u00e9)<\/td><td>En croissance<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n<h2 class=\"wp-block-heading\">Conclusion<\/h2>\n\n\n\n<p class=\"wp-block-paragraph\">L\u2019architecture x86 (Intel\/AMD) domine toujours les PC et serveurs gr\u00e2ce \u00e0 sa compatibilit\u00e9 et ses hautes performances, m\u00eame si ARM et RISC-V gagnent du terrain.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>&nbsp;Introduction \u00e0 l\u2019architecture x86 L\u2019architecture&nbsp;x86&nbsp;est une famille de processeurs&nbsp;CISC&nbsp;(Complex Instruction Set Computer) d\u00e9velopp\u00e9e \u00e0 l\u2019origine par&nbsp;Intel&nbsp;(8086 en 1978) et aujourd\u2019hui domin\u00e9e par&nbsp;Intel et AMD. \ud83d\udd39&nbsp;Caract\u00e9ristiques principales&nbsp;: &nbsp;\u00c9volution des architectures x86 (Intel vs AMD) Intel G\u00e9n\u00e9ration Ann\u00e9e Innovations 8086 1978 Premier x86 (16 bits) 80386 1985 32 bits (mode prot\u00e9g\u00e9) Pentium 1993 Pipeline superscalaire Core 2 [&hellip;]<\/p>\n","protected":false},"author":1,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"_uag_custom_page_level_css":"","footnotes":""},"class_list":["post-2811","page","type-page","status-publish","hentry"],"uagb_featured_image_src":{"full":false,"thumbnail":false,"medium":false,"medium_large":false,"large":false,"1536x1536":false,"2048x2048":false},"uagb_author_info":{"display_name":"admin","author_link":"https:\/\/workboot.fr\/ciela\/author\/admin\/"},"uagb_comment_info":0,"uagb_excerpt":"&nbsp;Introduction \u00e0 l\u2019architecture x86 L\u2019architecture&nbsp;x86&nbsp;est une famille de processeurs&nbsp;CISC&nbsp;(Complex Instruction Set Computer) d\u00e9velopp\u00e9e \u00e0 l\u2019origine par&nbsp;Intel&nbsp;(8086 en 1978) et aujourd\u2019hui domin\u00e9e par&nbsp;Intel et AMD. \ud83d\udd39&nbsp;Caract\u00e9ristiques principales&nbsp;: &nbsp;\u00c9volution des architectures x86 (Intel vs AMD) Intel G\u00e9n\u00e9ration Ann\u00e9e Innovations 8086 1978 Premier x86 (16 bits) 80386 1985 32 bits (mode prot\u00e9g\u00e9) Pentium 1993 Pipeline superscalaire Core 2\u2026","_links":{"self":[{"href":"https:\/\/workboot.fr\/ciela\/wp-json\/wp\/v2\/pages\/2811","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/workboot.fr\/ciela\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/workboot.fr\/ciela\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/workboot.fr\/ciela\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/workboot.fr\/ciela\/wp-json\/wp\/v2\/comments?post=2811"}],"version-history":[{"count":4,"href":"https:\/\/workboot.fr\/ciela\/wp-json\/wp\/v2\/pages\/2811\/revisions"}],"predecessor-version":[{"id":2818,"href":"https:\/\/workboot.fr\/ciela\/wp-json\/wp\/v2\/pages\/2811\/revisions\/2818"}],"wp:attachment":[{"href":"https:\/\/workboot.fr\/ciela\/wp-json\/wp\/v2\/media?parent=2811"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}